LOADBench: A Large Open Analog Dataset and Benchmark for Machine Learning in IC Design

Analog integrated circuit (IC) design automation has historically been limited by a lack of standardized, open-source datasets and evaluation benchmarks. Most machine learning (ML) models for analog design rely on proprietary PDKs and custom, non-reproducible datasets. This research introduces LOADBench, a comprehensive open-source dataset and benchmarking suite designed to standardize ML applications in analog IC design. Utilizing the open-source SkyWater 130nm PDK, the dataset features over 100 operational amplifier (opamp) topologies across 1-, 2-, and 3-stage configurations. Each topology is accompanied by structural annotations, sizing constraints, Ngspice testbenches, and Pareto-optimal sizing-performance pairs generated via NSGA-II multi-objective optimization. Based on this data, the paper establishes six standardized benchmark tasks: inverse sizing,

topology selection, sub-circuit classification, structural circuit generation, Pareto-membership prediction, and multi-objective optimization. For B.Tech students, this framework provides a structured pathway to implement and evaluate ML models on real-world analog circuits without requiring commercial EDA licenses. While the dataset offers a robust foundation for opamps, its current scope is limited to these specific topologies, leaving other analog blocks like data converters or RF circuits for future expansion.

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