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A Novel Multilevel Inverter Topology Generating a 19-Level Output Voltage Using Phase-Disposition PWM

This M.Tech Electrical Engineering topic focuses on A Novel Multilevel Inverter Topology Generating a 19-Level Output Voltage Using Phase-Disposition PWM. It belongs to the Multilevel Inverters area within Power Electronics. The work…

Abstract This M.Tech Electrical Engineering topic focuses on A Novel Multilevel Inverter Topology Generating a 19-Level Output Voltage Using Phase-Disposition PWM. It belongs to the Multilevel Inverters area within Power Electronics. The work is suitable for research topic selection, synopsis preparation, literature review, converter modelling, MATLAB/Simulink or Python-based simulation, control design, hardware-oriented discussion, result analysis, and dissertation documentation. Students can use this 2023-onward open-access research reference as the base paper and then customize the implementation using suitable converter topology, switching strategy, controller design, efficiency analysis, THD analysis, power-quality metrics, and application requirements.
Reference Paper A Novel Multilevel Inverter Topology Generating a 19-Level Output Voltage Using Phase-Disposition PWM
Year 2025
Domain Power Electronics
Sub-Domain Multilevel Inverters
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