Design and implementation of a portable, high-speed, wide-bandwidth FPGA-based electrical impedance tomography system.

Electrical Impedance Tomography (EIT) is a non‑invasive imaging method that creates a map of internal conductivity in a closed area using voltage measurements taken at the boundary. This work tackles the design and build challenges of a portable, high‑speed, wide‑bandwidth EIT system that relies on Field‑Programmable Gate Array (FPGA) technology. The proposed architecture combines three key parts: * A high‑precision digital direct synthesizer that generates wide‑bandwidth current excitation. * A high‑speed analog‑to‑digital conversion interface. * An FPGA‑based digital demodulation block that extracts the real and imaginary components of the impedance. By exploiting the FPGA’s parallel processing, the system can acquire data fast enough for dynamic imaging. The design aims to

keep the signal‑to‑noise ratio high across a broad frequency range while staying compact and portable. Evaluation will use hardware‑in‑the‑loop simulations and experiments with phantom targets to measure spatial resolution, boundary‑measurement accuracy, and reconstruction speed. The framework also offers step‑by‑step guidance for real‑time demodulation algorithms and hardware‑software co‑design, providing a solid base for further research in high‑speed bio‑impedance and industrial process tomography.

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