Provenance-Aware Physics-Guided Feasibility-Region Learning for Pre-layout Two-Stage CMOS Op-Amp Sizing: A Calibration-Ready Workflow

Sizing an analog operational amplifier is a tough multi‑goal problem. You have to pick transistor sizes and bias points together so the circuit meets gain, bandwidth, slew rate, and stability targets. This project builds a provenance‑aware, physics‑guided workflow that learns the feasible region for a pre‑layout two‑stage CMOS op‑amp. It starts with schematic‑level simulation data and tests several machine‑learning models—Ridge regression, ExtraTrees, and multilayer perceptrons (MLP). Each model is enhanced with knowledge from the physical domain to predict whether a given design will work. The workflow runs LTspice simulations to check the models’ predictions against real physical limits for many design candidates. By turning the high‑dimensional design space into a

classified feasible region, the method gives analog designers clear guidance during the pre‑layout sizing step. The results show that mixing ML classifiers with physics‑based constraints cuts the amount of time spent on traditional iterative SPICE runs. It provides a systematic way to do robust analog design, active‑sampling replay, and optimization.

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