Electronics & Embedded Systems: Design and Optimization of Low-Power VLSI Circuits for Next-Generation Computing

Next‑generation computing needs VLSI circuits that use very little power. Lower power reduces heat and makes batteries last longer in portable devices. This research looks at how to design and improve energy‑efficient VLSI architectures using advanced power‑saving techniques. The work studies three main approaches: – Reducing leakage current – Using dynamic voltage and frequency scaling (DVFS) – Applying multi‑threshold voltage CMOS (MTCMOS) designs By examining the trade‑offs among power, delay, and area, the framework gives clear guidance for building sub‑micron and deep‑sub‑micron circuits. Simulations focus on: – Critical‑path analysis – Static (leakage) power dissipation – Dynamic switching energy at different frequencies The proposed method helps evaluate low‑power digital blocks such

as high‑speed adders, multipliers, and memory arrays—key components of modern embedded processors. Using industry‑standard electronic design automation tools, the study models and simulates these blocks to create a complete optimization path that balances performance and energy use in future computing systems. The resulting design techniques provide practical support for creating robust, energy‑aware integrated circuits.

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